1. Field of the Invention
The present invention relates to a multilevel (multivalued) QAM demodulator, a multilevel QAM demodulation method, and a wireless communication system. More specifically, the present invention relates to a multilevel QAM demodulator performing a phase rotation compensation and a phase noise compensation on a common phase signal and an orthogonal signal which are obtained by quasi-synchronous detection, a demodulation method therefore, and a wireless communication system.
2. Description of the Related Art
Measures against phase noise have been taken in a demodulation circuit of a digital wireless communication system. The phase noise is generated mainly by a local oscillator employed when a frequency band of a modulation signal is converted from an intermediate frequency (IF) band into a radio frequency (RF) band or from the RF band into the IF band. The phase noise constitutes one factor for deterioration in transmission characteristic of wireless communication.
FIG. 1 is a block diagram of a demodulator, which relates to a related art of the present invention and which compensates for phase noise. As shown in FIG. 1, the demodulator is configured to include an oscillator 1, an orthogonal detector 2, an analog/digital converter (hereinafter, “A/D”) 3, a phase comparator 5, a loop filter 6, a numerical controlled oscillator (hereinafter, “NCO”) 7, an averaging circuit 8, a phase correction value estimator 9, and two phase rotators 4 and 10. In the following description, an input signal will be described as a multilevel quadrature amplitude modulation (multilevel QAM) signal and a detection method for the demodulator will be described as quasi-synchronous detection. Furthermore, orthogonal baseband components (a common phase signal and an orthogonal signal) are expressed by normal notation of “Ich” and “Qch”, respectively.
An IF band signal (IF IN) influenced by phase noise is input to the orthogonal detector 2 performing quasi-synchronous detection of the multilevel QAM demodulator. The input signal (IF IN) is converted into analog signals (Ich1, Qch1) by using an output from the local oscillator 1 having substantially the same frequency as that of a carrier. The A/D 3 converts the analog signals (Ich1, Qch1) into digital signals (Ich2, Qch2). In this case, the digital signals (Ich2, Qch2) are influenced by not only a deterioration caused by the phase noise but also phase rotation resulting from a frequency difference between a local frequency output from the oscillator 1 and an IF frequency (a frequency of the input signal (IF IN)).
Compensation for the phase rotation and that for the phase noise will now be described in this order.
The compensation for the phase rotation is executed by a phase rotation compensating circuit. The phase rotation compensating circuit is constituted by a carrier loop controller (carrier PLL controller) configured to include the phase rotator 4, the phase comparator 5, the loop filter 6, and the NCO 7.
The phase rotator 4 complex-multiplies the digital signals (Ich2, Qch2) by phase control signals (cos ON, sin ON) output from the NCO 7, thereby converging the phase rotation. The phase comparator 5 makes a symbol determination with respect to signals (Ich3, Qch3) obtained from the phase rotator 4 to obtain signal determination values (Ich4, Qch4), and calculates polarity signals (Di, Dq) defined by positive or negative signs of the signals (Ich4, Qch4) and error signals (Ei, Eq) defined by a difference between the signals (Ich3, Qch3) and the signals (Ich4, Qch4). The phase comparator 5 also calculates a phase difference signal Op (Op=Dq·Ei−Di·Eq) from the polarity signals (Di, Dq) and the error signals (Ei, Eq) and outputs the phase difference signal Op to the loop filter 6. A polarity of the phase difference signal Op indicates lead or delay of a phase and an absolute value of the phase difference signal Op indicates degree of the lead or delay of the phase. The loop filter 6 smoothes the phase difference signal Op and outputs a signal OL corresponding to a carrier frequency difference. The NCO 7 accumulates the signal OL, converts the accumulated signal OL into a value ON corresponding to an angle, and outputs values of a sine wave and a cosine wave (cos ON, sin ON) corresponding to the angle to the phase rotator 4 as a first phase control signal.
The compensation for the phase noise will next be described. If the carrier PLL controller cannot follow up to the phase shift and a carrier phase shift occurs due to the influence of the phase noise, this phase shift can be detected by the phase difference signal Op. However, the phase difference signal Op is often unable to appropriately indicate a direction of the phase shift due to the influence of heat noise. Due to this, the averaging circuit 8 is used to average the phase difference signal Op to suppress the influence of the heat noise. The averaging circuit 8, the phase correction value estimator 9, and the phase rotator 10 shown in FIG. 1 constitute a phase noise compensating circuit.
The phase correction value estimator 9 multiplies an average value (Op_ave) of the phase difference signal output from the averaging circuit 8 by a required gain α (hereinafter, “correction coefficient”), thereby associating the phase difference signal with a phase rotational angle. Thereafter, values of a sine wave and a cosine wave (cos α·Op_ave, sin α·Op_ave) corresponding to angle information (hereinafter, “phase correction value”) denoted by “α·Op_ave” are output as a second phase control signal. The phase rotator 10 multiplies the signals (Ich3, Qch3) by the values (cos α·Op_ave, sin α·Op_ave), thereby returning a carrier phase shift. In this way, the carrier phase shift is corrected in a subsequent stage of the carrier PLL controller on the basis of a phase shift amount estimated from the phase difference signal Op, thereby realizing compensation for the phase noise that cannot be corrected simply by the carrier PLL controller.
As a related technique of the modulator related to the present invention, there is disclosed a carrier wave reproducing loop configured to include a complex multiplier, a phase error detector, an averaging circuit, an LPF, and an NCO in Japanese Patent Application Laid-Open (JP-A) No. 2000-138722 (paragraph [0060], FIG. 2). There is also disclosed C/N detection means included in a demodulator in JP-A No. 2002-158724 (FIG. 1). There are also disclosed carrier reproducing means and phase noise correction means in JP-A No. 2003-018230 (FIGS. 5, and 12). The carrier reproducing means includes a complex multiplier, a phase comparator, a loop filter, a numerically controlled oscillator (NCO), and a sin θ and cos θ generator.
Meanwhile, an optimum value is present for the correction coefficient α associating the average value (Op_ave) of the phase difference signal with the phase corrected value (α·Op_ave). With the configuration shown in FIG. 1, it is required to consider the optimum value in advance since the correction coefficient α is a set value.
Furthermore, the correction coefficient α depends on phase noise characteristics and the phase noise characteristics depend on performance of the oscillator. With the configuration shown in FIG. 1, therefore, it is required to adjust an appropriate value of the correction coefficient α on the basis of the performance of the oscillator. Particularly if the oscillator is changed to another oscillator to follow a change in a utilization frequency of the RF band, it is required to reconsider the optimum value for the correction coefficient α. It takes lots of time and labor to perform reconsideration operation.